Modern integrated circuits contain thousands of semiconducting devices on a single chip and as the device density of a given chip increases more layers of metallization are required to interconnect the devices. Moreover, within a given metal layer, the horizontal distance separating metallization lines must be reduced in order to minimize the chip size as integrated circuit device density increases. At the same time, metallization resistance and capacitance must be minimized in order to meet the chip's speed and performance requirements. Traditionally, the inter-level dielectrics used to isolate metallization lines within a same level and metallization lines in two different levels have been performed using materials with high dielectric constants. For example, undoped and doped silicon dioxide layers such as borophosphosilicate glass (BPSG), phosphosilicate glass (PSG), and plasma and chemical vapor deposited tetraethylorthosilicate based (TEOS) oxides have been used as dielectric layers in these multi-metallization structures. The semiconductor industry's continuing demand for integrated circuits with ever increasing device densities and operating speeds requires new dielectric materials having low dielectric constants in order to reduce cross-talk, capacitive coupling, and resulting speed degradation.
However, many of the low dielectric constant materials which are used to form inter-level and inter-metal dielectric layers are difficult to work with because of their poor mechanical strength. In addition, many of these materials have processing temperature limitations, i.e., they cannot be exposed to thermal processing over a certain temperature once formed on an integrated circuit. In addition, many of these materials also provide poor thermal conductivity. Therefore, heat generated during high frequency operation cannot be effectively dissipated from the integrated circuit whereby circuit reliability becomes a problem. Accordingly, a need exists for a method for forming an interconnect structure with a dielectric layer having a low dielectric constant whereby mechanical strength disadvantages are reduced, and thermal dissipation is improved.